FPGA Acceleration Engineer
Fremont, CA
  • Summary

    We are looking for an FPGA acceleration engineer who will make key contributions to our mission by taking complex and parallel problems and accelerating them on FPGAs using OpenCL and other high-level design frameworks.

  • Main Responsibilities
    1. Work with the product marketing team to understand marketing requirements and turn an idea or algorithm into a highly optimized implementation on FPGAs by using OpenCL and other high-level design techniques.
    2. Develop and maintain a test environment (host code) to demonstrate the functionality and performance of the accelerated function on the FPGAs.
    3. Project the performance of new or existing blocks and deliver performance improvements.
    4. Work with internal teams to release acceleration blocks so we can measure and demonstrate application-level performance improvements.
  • Requirements
    1. MS/Ph.D. in EE, CS, or related field with 2-5 years industry experience. We will also consider recent graduates who have shown extraordinary capabilities during internship or other school projects.
    2. Experience with hardware design from high-level language and exposure to the frameworks such as OpenCL, high level synthesis, or CUDA.
    3. Experience with Linux and common programming languages (Python, C/C++, etc)
    4. Experience documenting workflows and pipelines.
    5. Experience performance analysis and projection based on requirements and constraints.
    6. Experience with profiling C/C++ and OpenCL for performance troubleshooting and improvement.
    7. Excellent organizational and time management skills.
    8. FPGA design experience is highly preferred but we will consider candidates without it if highly skilled in other aspects.
    9. Highly collaborative and able to work well in a team environment.

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